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DSC511-05 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Four Output 56.6MHz Clock Generator - Micrel

भाग संख्या DSC511-05
समारोह Four Output 56.6MHz Clock Generator
मैन्युफैक्चरर्स Micrel 
लोगो Micrel लोगो 
पूर्व दर्शन
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<?=DSC511-05?> डेटा पत्रक पीडीएफ

DSC511-05 pdf
DSC511-05
Crystal-less Four Output 56.6MHz Clock Generator
Specifications (Unless specified otherwise: T=25° C, VDD =3.3V)
Parameter
Supply Voltage1
Frequency Stability
Startup Time3
Input Logic Levels
Input logic high
Input logic low
Output Disable Time4
Output Enable Time
Pull-Up Resistor2
Condition
Min.
Typ.
Max. Unit
VDD 2.25
Includes frequency variations
Δf due to initial tolerance, temp.
and power supply voltage
tSU T=25°C
3.6
±100
±50
5
V
ppm
ms
VIH
0.75xVDD
-V
VIL - 0.25xVDD
tDA 5 ns
tEN 20 ns
Pull-up on OE pin
40 kΩ
Parameter
Condition
Supply Current2
(All LVDS outputs)
LVDS Outputs
All outputs running at 56.6MHz,
IDD RL=100Ω
All outputs disabled
Output offset Voltage
Delta Offset Voltage
VOS
∆VOS
RL =100Ω Differential
Pk to Pk Output Swing
Output Transition time3
Rise Time
Fall Time
Frequency
Output Duty Cycle
VPP
tR
tF
f0
SYM
Single-Ended
20% to 80%
RL=100Ω, CL= 2pF
At any output
Differential
Period Jitter
JPER
Integrated Phase Noise
200kHz to 20MHz @56.6MHz
JPH 100kHz to 20MHz @56.6MHz
12kHz to 20MHz @56.6MHz
Notes:
1.
2.
3.
4.
VDD pins 9 and 19 should be filtered with 0.1uf capacitor.
tsu is setup time to achieve 100ppm at output frequency after VDD is applied and outputs are enabled.
Output Waveform and Test Circuit figures below define the parameters.
Output is enabled if OE pin is floated or not connected.
Min.
1.125
2.3
48
Typ.
110
29
350
200
2.5
1.7
Max. Unit
TBD
TBD
1.4
50
TBD
460
52
TBD
TBD
2
mA
V
mV
mV
ps
MHz
%
psRMS
psRMS
_____________________________________________________________________________________________________________________________ _________________
DSC511-05
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डाउनलोड[ DSC511-05 Datasheet.PDF ]


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