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HD74LS259 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 8-bit Address Latch - Renesas

भाग संख्या HD74LS259
समारोह 8-bit Address Latch
मैन्युफैक्चरर्स Renesas 
लोगो Renesas लोगो 
पूर्व दर्शन
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<?=HD74LS259?> डेटा पत्रक पीडीएफ

HD74LS259 pdf
HD74LS259
Pin Arrangement
Latch
Select
A1
B2
C3
Q0 4
Q1 5
Outputs
Q2 6
Q3 7
GND 8
A
B CLR
CG
Q0 D
Q1 Q7
Q2 Q6
Q3 Q5
Q4
16 VCC
15 Clear
14 Enable
13 Data Input
12 Q7
11 Q6
Outputs
10 Q5
9 Q4
(Top view)
Function Table
CLR
H
H
L
L
Input
G
L
H
L
H
Output of
addressed latch
D
Qio
D
L
Each other output
Qio
Qio
L
L
Function
Addressable latch
Memory
8-line demultiplexer
Clear
Select inputs
Latch addressed
CBA
LLL0
L LH1
LHL 2
L HH 3
HL L 4
HLH5
HHL 6
HHH 7
Notes: 1. H; high level, L; low level
2. D; the level at the data input
3. Oio; the level of Qi (i = 0, 1, 7, as appropriate) before the indicated steady state input conditions were
established.
Rev.2.00, Feb.18.2005, page 2 of 7

विन्यास 8 पेज
डाउनलोड[ HD74LS259 Datasheet.PDF ]


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