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HD74LS195A डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 4-bit Parallel-Access Shift Register - Renesas

भाग संख्या HD74LS195A
समारोह 4-bit Parallel-Access Shift Register
मैन्युफैक्चरर्स Renesas 
लोगो Renesas लोगो 
पूर्व दर्शन
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HD74LS195A pdf
HD74LS195A
Function Table
Inputs
Outputs
Clear Shift / Clock
Load
Serial
JK
A
Parallel
BC
D QA QB QC QD QD
L X X XXXXXX L L L LH
HL
XXa b c d a b c dd
H
H
L
X
X
X
X
X
X
QA0
QB0
QC0
QD0
QD0
H
H
L
H
X
X
X
X
QA0
QA0
QBn
QCn
QCn
H
H
L
L
XXXX
L
QAn
QBn
QCn
QCn
H
H
H
H
X
X
X
X
H
QAn
QBn
QCn
QCn
H
H
HL
X
X
X
X
QAn
QAn
QBn
QCn
QCn
Notes: 1. H; high level, L; low level, X; irrelevant
2. ; transition from low to high level
3. a to d; the level of steady-state input at inputs A, B, C, or D, respectively
4. QA0 to QD0; the level of QA, QB, QC, or QD, respectively before the indicated steady-state input conditions were
established.
5. QAn to QCn; the level of QA, QB, QC, respectively before the most-recent transition of the clock.
Block Diagram
Shift/Load
Control
Serial
Inputs
JK
A
Parallel Inputs
BC
D
Clock
Clear
Clear
R QA
CK
S QA
Clear
R
CK
S QB
Clear
R
CK
S QC
Clear
R QD
CK
S QD
QA QB QC QD QD
parallel Outputs
Absolute Maximum Ratings
Item
Symbol
Ratings
Supply voltage
VCC
7
Input voltage
VIN 7
Power dissipation
PT 400
Storage temperature
Tstg –65 to +150
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Unit
V
V
mW
°C
Rev.3.00, Jul.15.2005, page 2 of 7

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