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M37450PFS डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - MICROCOMPUTERS - Mitsubishi

भाग संख्या M37450PFS
समारोह MICROCOMPUTERS
मैन्युफैक्चरर्स Mitsubishi 
लोगो Mitsubishi लोगो 
पूर्व दर्शन
1 Page
		
<?=M37450PFS?> डेटा पत्रक पीडीएफ

M37450PFS pdf
MITSUBISHI MICROCOMPUTERS
M374S0PFS
PIGGYBACK for M374S0M2-XXXFP,M374S0M4-XXXFP,M374S0MS-XXXFP
PIN DESCRIPTION
Pin Name
Vee.
Vss
CNVss
RESET
Supply voltage
CNVss
Reset Input
X'N
XOUT
Clock input
Clock output
¢ Timing output
SYNC
-
R/W
Synchronous signal
output
Read/Wrtte
status output
POO-P07 1/0 port PO
P1 o-P1 7 1/0 port P1
P2o-P27 1/0 port P2
P30 -P37 110 port P3
P4o-P47
P50 -P57
Input port P4
1/0 port P5
P6o-P67 1/0 port P6
D-A,. D-A2 D-A output
ADV REF
A-O refference
voltage Input
DAVREF
O-A refference
voltage mput
AVss
Analog power supply
,AVec
-
RD
-
WR
Analog power supply
Read signal output
Wnte signal output,
RESEToUT Reset output
Ao-A14
Do-D7
Output port A
Input port 0
Input!
Output
Functions
Power supply Inputs 5V±10% to Vee and OV to Vss
Controls the processor mode of the chip Normally connected to Vss or Vee
Input
To enter the reset state, the reset Input pin must be kept at a "L" for more than 8 clock cycles (under nor-
mal Vee conditions)
If more time IS needed for the crystal oscillator to stabilize, this "L" condition should be maintained for the
required time
Input
Output
These are 1/0 pms of mternal clock generating circuit for mam clock To control generating frequency, an
external ceramic or a quartz crystal oscillator IS connected between the X,N and XOUT pins If an external
clock IS used, the clock source should be connected to the XIN pm and the XOUT ptn should be left open
Output Outputs sIgnal consisting of oscillattng frequency divided by four
Output This signal IS output "H" durtng operation code fetch and IS used to control stngle stepPtng of programs
Output This signal determtnes the direction of the data bus It IS "H" dunng read and "L" durtng wrtte
1/0 Port PO IS an a-bit 110 port with directional registers allowtng each liD bit to be tndlvldually programed as
tnput or output The output structure IS CMOS output The low-order bits of the address are output except
In stngle-chlp mode
1/0 Port P1 IS an a-bit 1/0 port and has basically the same function as port PO The high-order bits of the
address are output except In single-chip mode
110 Port P2 IS an a-bit 110 port and has basically the same function as PO Used as data bus except In stngle-
chip mode
1/0 Port P3 IS an a-bit 110 port and has basically the same function as PO Senal 110, PWM output, or even 1/0
function can be selected with a program
Input Analog Input pin for the A-O converter They may also be used as digital Input pinS
1/0 Port P5 IS an 8-blt I/O port and has basically the same function as PO ThiS port functions as an 8-blt data
bus for the master CPU when slave mode IS selected with a program
1/0 Port P6 IS an 8-blt 1/0 port and has basically the same function as PO PinS P63 to P67 change to control bus
for the master CPU when slave mode IS selected with a program Pins P60 to P62 may be programed as
external Interrupt Input PinS
Output Analog signal from O-A converter IS output
Input Reference voltage Input pm for A-O converter
Input Reference voltage Input pin for O-A converter
Ground level Input pin for A-O and D-A converter
Power supply Input pin for A-D converter
Output Control signal output as active "L" when val led data [s read from data bus
Output Control signal output as active OIL" when wrltmg data from data bus to external component
Output
Control signal output as active "H" dunng reset It IS used as a reset output signal for perpheral compo-
nents
Output Port A outputs the adresses to the EPROM mounted on the top of the package
Input Port 0 takes the Input data from the EPROM mounted on the top of the package
. .. .EMLITESCUTBRIISCHI
3-149

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