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FDMC612PZ डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - MOSFET - Fairchild Semiconductor

भाग संख्या FDMC612PZ
समारोह MOSFET
मैन्युफैक्चरर्स Fairchild Semiconductor 
लोगो Fairchild Semiconductor लोगो 
पूर्व दर्शन
1 Page
		
<?=FDMC612PZ?> डेटा पत्रक पीडीएफ

FDMC612PZ pdf
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = -250 μA, VGS = 0 V
ID = -250 μA, referenced to 25 °C
VDS = -16 V, VGS = 0 V
VGS = ±12 V, VDS = 0 V
-20 V
-19 mV/°C
-1 μA
±10 μA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250 μA
-0.6 -0.9 -1.5
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = -250 μA, referenced to 25 °C
9 mV/°C
VGS = -4.5 V, ID = -14 A
5.9 8.4
rDS(on)
Static Drain to Source On Resistance VGS = -2.5 V, ID = -11 A
8.2 13 mΩ
VGS = -4.5 V, ID = -14 A, TJ = 125 °C
8.3 13
gFS Forward Transconductance
VDS = -5 V, ID = -14 A
85 S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = -10 V, VGS = 0 V,
f = 1 MHz
5710
1215
1170
7995
1700
1640
pF
pF
pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VDD = -10 V, ID = -14 A,
VGS = -4.5 V, RGEN = 6 Ω
VDD = -10 V, ID = -14 A,
VGS = -4.5 V
26 42 ns
52 83 ns
96 154 ns
81 130 ns
53 74 nC
9.4 nC
18 nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage VGS = 0 V, IS = -14 A
VGS = 0 V, IS = -2 A
(Note 2)
(Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = -14 A, di/dt = 100 A/μs
-0.8 -1.3
-0.7 -1.2
39 62
17 31
V
ns
nC
Notes:
1: RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined
by the user’s board design.
a. 53 °C/W when mounted on a
1 in2 pad of 2 oz copper.
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
2: Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3: EAS of 38 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = -16 A, VDD = -18 V, VGS = -10 V.
4: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2013 Fairchild Semiconductor Corporation
FDMC612PZ Rev.C3
2
www.fairchildsemi.com

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