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डेटा पत्रक - Over-Voltage Tolerant 1.5V 1:4 Fanout Buffer - IDT

भाग संख्या 830154I-08
समारोह Over-Voltage Tolerant 1.5V 1:4 Fanout Buffer
मैन्युफैक्चरर्स IDT 
लोगो IDT लोगो 
पूर्व दर्शन
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830154I-08 pdf
830154I-08 Data Sheet
Table 1. Pin Descriptions
Number
1
2
3
4
5
6
7
8
Name
CLK_IN
Q1
Q2
Q3
Q4
GND
VDD
OE
Type
Input
Pulldown
Output
Output
Output
Output
Power
Power
Input
Pullup
Description
Single-ended clock input. LVCMOS interface levels.
Single-ended clock output. LVCMOS interface levels.
Single-ended clock output. LVCMOS interface levels.
Single-ended clock output. LVCMOS interface levels.
Single-ended clock output. LVCMOS interface levels.
Power supply ground.
Power supply pin.
Output enable pin. See Table 3. LVCMOS interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
CIN
Parameter
Input Capacitance
CPD Power Dissipation Capacitance
RPULLUP
Input Pullup Resistor
RPULLDOWN Input Pulldown Resistor
ROUT
Output Impedance
Test Conditions
VDD = 3.465V
VDD = 2.375V
VDD = 1.95V
VDD = 1.6V
VDD = 3.3V ± 5%
VDD = 2.5V ± 5%
VDD = 1.8V ± 0.15V
VDD = 1.5 ± 0.1V
Minimum
Typical
4
14
13
13
12
51
51
9
10
12
15
Maximum
Units
pF
pF
pF
pF
pF
k
k
Function Table
Table 3. OE Configuration Table
Input
OE Operation
0 Q[4:1] disabled (high-impedance)
1 (default) Q[4:1] enabled
NOTE: OE is an asynchronous control.
©2016 Integrated Device Technology, Inc
2
Revision A March 30, 2016

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830154I-08Over-Voltage Tolerant 1.5V 1:4 Fanout BufferIDT
IDT


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