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8413S12 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - HCSL/ LVCMOS Clock Generator - IDT

भाग संख्या 8413S12
समारोह HCSL/ LVCMOS Clock Generator
मैन्युफैक्चरर्स IDT 
लोगो IDT लोगो 
पूर्व दर्शन
1 Page
		
<?=8413S12?> डेटा पत्रक पीडीएफ

8413S12 pdf
8413S12 DATA SHEET
Block Diagram
nMR
Pullup
FSEL_A [0:1] Pulldown
FSEL_B [0:1] Pulldown
FSEL_C [0:1] Pulldown
FSEL_D [0:1] Pulldown
FSEL_E [0:1] Pulldown
2
2
2
2
2
PLL_SEL Pullup
REF_SEL Pullup
CLK,
nCLK
Pulldown
Pullup/
Pulldown
XTAL_IN
XTAL_OUT
OSC
IREF
0
1
Clock
Output
Control
Logic
VCO
NOTE: OE_[A:G] and OE_REF pins have pullup resistors.
00 = 100MHz
01 = 125MHz
10 = 156.25MHz
11 = 312.5MHz
00 = 100MHz
01 = 125MHz
10 = 156.25MHz
11 = 312.5MHz
00 = 100MHz
01 = 125MHz
10 = 156.25MHz
11 = 312.5MHz
00 = 100MHz
01 = 125MHz
0 10 = 156.25MHz
11 = 312.5MHz
1
00 = 100MHz
01 = 125MHz
10 = 156.25MHz
11 = 312.5MHz
50MHz
125MHz
OE_REF
OE_A
QA0,
nQA0
QA1,
nQA1
OE_B
QB0,
nQB0
QB1,
nQB1
OE_C
QC0,
nQC0
QC1,
nQC1
OE_D
QD0,
nQD0
QD1,
nQD1
OE_E
QE0,
nQE0
QE1,
nQE1
QF
OE_G
QG
QREF0
QREF1
HCSL/ LVCMOS CLOCK GENERATOR
2
REVISION D 1/27/15

विन्यास 30 पेज
डाउनलोड[ 8413S12 Datasheet.PDF ]


शेयर लिंक


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