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8T73S208B-01 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - LVPECL Clock Divider and Fanout Buffer - IDT

भाग संख्या 8T73S208B-01
समारोह LVPECL Clock Divider and Fanout Buffer
मैन्युफैक्चरर्स IDT 
लोगो IDT लोगो 
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8T73S208B-01 pdf
8T73S208B-01 Datasheet
Pin Descriptions and Pin Characteristics
Table 1. Pin Descriptions
Number
1,
32
Name
ADR1, ADR0
Type
Input
Pulldown
Description
I2C Address inputs. LVCMOS/LVTTL interface levels.
2, 7, 18, 23
3, 4
5, 6
8, 17
9, 10
VEE
Q0, nQ0
Q1, nQ1
VCCO
Q2, nQ2
Power
Output
Output
Power
Output
Negative supply pins.
Differential output pair 0. LVPECL interface levels.
Differential output pair 1. LVPECL interface levels.
Output supply pins.
Differential output pair 2. LVPECL interface levels.
11, 12
13, 14
15, 16
19, 20
Q3, nQ3
Q4, nQ4
Q5, nQ5
Q6, nQ6
Output
Output
Output
Output
Differential output pair 3. LVPECL interface levels.
Differential output pair 4. LVPECL interface levels.
Differential output pair 5. LVPECL interface levels.
Differential output pair 6. LVPECL interface levels.
21, 22
Q7, nQ7
Output
Differential output pair 7. LVPECL interface levels.
24,
25
FSEL0,
FSEL1
Input
Pulldown Frequency divider select controls. See Table 3A for function.
LVCMOS/LVTTL interface levels.
26 IN Input
Non-inverting differential clock input. RT = 50termination to VT.
27
VT
Termination
Input
Input for termination. Both IN and nIN inputs are internally terminated 50
to this pin. See input termination information in Section, “Applications
Information”.
28 nIN Input
Inverting differential clock input. RT = 50termination to VT.
29 VCC Power
Power supply pin.
30
SDA
I/O
Pullup
I2C Data Input/Output. Input: LVCMOS/LVTTL interface levels. Output:
open drain.
31
SCL
Input
Pullup
I2C Clock Input. LVCMOS/LVTTL interface levels.
NOTE: Pulldown and Pullup refers to an internal input resistors. See Section, “Table 2. Pin Characteristics” values.
Table 2. Pin Characteristics
Symbol
Parameter
CIN
RPULLDOWN
RPULLUP
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
Test Conditions
Minimum
Typical
2
51
51
Maximum
Units
pF
k
k
©2016 Integrated Device Technology, Inc.
2
April 28, 2016

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