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A1351 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - High Precision Linear Hall Effect Sensor IC - Allegro MicroSystems

भाग संख्या A1351
समारोह High Precision Linear Hall Effect Sensor IC
मैन्युफैक्चरर्स Allegro MicroSystems 
लोगो Allegro MicroSystems लोगो 
पूर्व दर्शन
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<?=A1351?> डेटा पत्रक पीडीएफ

A1351 pdf
A1351
High Precision Linear Hall Effect Sensor IC
with a Push/Pull, Pulse Width Modulated Output
Features and Benefits
Pulse width modulated (PWM) output provides increased noise
immunity compared to an analog output
1 mm case thickness provides greater coupling for current
sensing applications
Push/pull output
Customer-programmable offset and sensitivity
Factory-programmed 0%/°C Sensitivity Temperature Coefficient
Programmability at end-of-line
Selectable unipolar or bipolar quiescent duty cycles
Selectable sensitivity range between 0.055% and 0.095% D/G
Temperature-stable quiescent duty cycle output and sensitivity
Precise recoverability after temperature cycling
Output duty cycle clamps provide short circuit diagnostic
capabilities
Optional 50% D calibration test mode at device power-up
Wide ambient temperature range: –40°C to 125°C
Resistant to mechanical stress
Package: 4 pin SIP (suffix KT)
1 mm case thickness
Not to scale
Description
TheA1351 device is a high precision, programmable linear Hall
effect sensor IC with a pulse width modulated (PWM) output.
The duty cycle, D, of the PWM output signal is proportional
to an applied magnetic field. The A1351 device converts an
analog signal from its internal Hall element to a digitally
encoded PWM output signal. The coupled noise immunity of
the digitally encoded PWM output is far superior to the noise
immunity of an analog output signal. A simple RC network
can be used to convert the digital PWM signal back to analog
signal.
The BiCMOS, monolithic circuit inside of theA1351 integrates
a Hall element, precision temperature-compensating circuitry
to reduce the intrinsic sensitivity and offset drift of the Hall
element, a small-signal high-gain amplifier, proprietary
dynamic offset cancellation circuits, and PWM conversion
circuitry. The dynamic offset cancellation circuits reduce
the residual offset voltage of the Hall element. Hall element
offset is normally caused by device over molding, temperature
dependencies, and thermal stress. The high frequency offset
cancellation (chopping) clock allows for a greater sampling
rate, which increases the accuracy of the output signal and
results in faster signal processing capability.
Continued on the next page…
V+
VCC
CBYPASS
Functional Block Diagram
Regulator
VREG
1
2
2
1
PWM
Frequency Trim
PWM Carrier
Generation
Chopper
Switches
Amp
Signal
Recovery
Signal
Conditioning
Sensitivity
Trim
Temperature
Compensation
% Duty
Cycle
% Duty Cycle
Temperature
Coefficient
A1351-DS, Rev. 4
PWM
Modulation
Logic with
Push-Pull
Output
PWMOUT/
Programming
GND

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डाउनलोड[ A1351 Datasheet.PDF ]


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